Using two 4-bit registers R1 and R2, and AND gates, OR gates, and inverters, draw one bit slice of the logic diagram that implements all of the following statements: Co: R20 Clear R2 synchronously with the clock Ci: R2 + R2 Complement R2 C2: R2 + R1 Transfer R1 to R2 The control variables are mutually exclusive (i.e., only one variable can be equal to 1 at any time) while the other two are equal to 0. Also, no transfer into R2 is to occur for all control variables equal to 0. Hint: you only need to take care of the least significant bit of R1 and R2. R1 LOAD PC ova R2 HLOAD